Audio Engineering Society – Melbourne Section

The next meeting of the AES Melbourne Section will be an in-person event held on
Monday 20^th April 2026 at 7:30pm at the Collarts Collingwood campus.

It will also be live-streamed on our YouTube channel:
https://www.youtube.com/AESMelbourneSection

Paul Messick will present on the topic of:

Low Jitter Clock Generation for Digital Audio

The demands of modern audio converters make low-jitter audio clocks a critical requirement if high-performance is to be achieved. It is now possible to find affordable ADCs and DACs that approach or exceed 130dB SNR and -120dB THDN. Run-of-the-mill clock generators will not cut it for performance at this level. In this presentation, Paul will show how jitter affects audio, how much jitter is allowed given an audio-quality target, what kind of clock generators can achieve these specs, and how to measure jitter. Since most pro-audio systems need to interface to the outside world for timing, He will also talk about clock recovery and jitter attenuation. Finally, he’ll tie this all together with measurements on a real product that achieves suitably stratospheric performance.