Hardware Designer Paul Messick presented on the topic of:
Low Jitter Clock Generation for Digital Audio
We gathered in the Collarts Critical Listening Room, where Section Chair, Graeme Huon welcomed us and introduced Paul, giving a brief outline of his career to date covering 40 years of designing all types of electronics, working for a wide range of companies, including Dallas Semiconductor, JPL (Jet Propulsion Laboratories), M-Audio, Digidesign and more. Graeme told us that Paul was head of engineering at M-Audio/Digidesign and later founded Avermetrics, which made production line and bench top audio analyzers. Since moving to Australia, he founded Glassworks Audio, designing high-performance studio gear for his own brand and for other select clients.
Paul started his presentation with a quick refresher on sampling, showing the effects of jitter on the recovered waveform.
Then he explained that this jitter manifests itself as noise in the audio (approximately Gaussian in nature) and went on to show by calculation that for a target Signal to Noise Ratio of 130dB (fmax=15kHz) the jitter would need to be < 3.3pS
Paul then moved on to discussing various types of oscillators used to generate the clock signal, indicating that a Crystal clock is the gold standard, but has the disadvantage of being fixed in frequency making it unsuitable when the clock needs to synchronise to an external source. So, he indicated that this meant that a VCO was needed and discussed both LC and Ring Oscillators. He characterised LC Oscillators as having good jitter performance but are high cost, and Ring Oscillators as being low jitter performance and low cost, and posited that the jitter performance of the Ring Oscillator could be improved by setting the frequency very high and dividing by a large number (N). The jitter would also be divided by a factor of 20log(N) so a < 100fS range jitter is possible.
Paul then covered some examples of external clocks that need to be synchronised to – Word Clock, AES3, Media Clocks (AVB, Dante etc.), Video – explaining that this is typically done with a phase locked loop (PLL). He covered basic digital, analog, and hybrid (digital+analog) PLLs. He cited several examples of jitter attenuator ICs, commenting that many are designed for the telecoms industry. He then focused on a part that he had done a lot of work with, the Microchip ZL30252, going into detail on its design and performance.
Paul then spoke about measuring jitter, and some of the commercial instruments available like the Rhode & Schwartz FSWP, Keysight E5052B, Anritsu MS2850A, and Rhode & Schwartz RTP (Oscilloscope with Jitter Analysis) noting that their price tag of US$100K plus puts them out of reach of most people. He indicated that a Spectrum Analyser with a low noise LO could be used in conjunction with software, like the PN module from John Miles KE5FX GPIB Toolkit package, commenting that this software could be paired with something like the vintage HP8568B SA, which (used to be) readily available on eBay for ~US$1500.
Paul then showed us his design based on the ZL30252, the test setup using a HP8568B and the GPIB Toolkit software, and the device’s measured performance, which was an impressive 9.3pS (100Hz-400kHz). Given that the data sheet spec for this chip’s jitter is 1-2 pS, he theorised that the ageing test instrument’s LO jitter was dominating the result. He commented that at 2pS, the Signal to Noise Ratio would be 134dB at 15kHz bandwidth.
Paul’s conclusion was that achieving a low jitter design has become pretty easy to generate, but measuring jitter at these levels is not easy, unless you have a spare US$100K.
Paul then threw the meeting open for questions, covering acceptable jitter performance in typical studio environments and network clock recovery.
Here’s a video of Paul’s presentation
It is also available for direct viewing on our YouTube channel at: https://youtu.be/I6kl9ry4Xbw
Paul’s slides, as a PDF document, can be viewed here
https://aesmelbourne.org.au/wp-content/media/Low-Jitter-Clock-Gen-Presentation.pdf
We thank Paul for his interesting and illuminating presentation which was appreciated by all who attended.
We also thank Collarts (https://www.collarts.edu.au/courses/music-audio/) for providing the venue, and their staff Jason Torrens and Will Petts who willingly gave of their time and talents to set up and operate the AV and streaming systems so that Paul’s talk could be viewed live online and recorded for later viewing on YouTube.
Related links:
Microchip ZL30252 – https://www.microchip.com/en-us/product/ZL30252
John Miles GPIB Toolkit software package http://www.ke5fx.com/gpib/readme.htm
Rhode & Schwartz FSPW – https://www.rohde-schwarz.com/us/products/test-and-measurement/phase-noise-analyzers/rs-fswp-phase-noise-analyzer-and-vco-tester_63493-120512.html
HP8568B Spectrum Analyser https://surplustest.co.uk/product/hp-8568b-rf-spectrum-analyzer-100-hz-to-1-5-ghz/
Author: Peter Smerdon (Secretary)
24 April 2026
